Stages & Alternances

Synthèse de réseaux (semi)interpénétrés de COF/polymères

LPPICY Cergy University • Neuville sur Oise

Télétravail4-6 moisExpire dans 13 jours

Job Description: Battery Membrane Development Intern Overview: The current climate change and energy needs require an increase in the use of green and renewable energy. However, due to their intermittent nature, the use of these energy sources requires the development of low-cost and high-safety storage systems such as batteries. The membrane plays a crucial role in a battery by ensuring the separation between the two electrodes and the ionic conduction to close the electrical circuit. Responsibilities: Develop networks of COF/polymer (semi-)interpenetrated structures for battery membranes. Explore various synthesis pathways including dispersion of synthesized COFs in polymer matrices/networks and in-situ synthesis of COF/polymer (semi-)interpenetrated networks. Characterize the materials using different physico-chemical and electrochemical techniques. Assemble a prototype with the best candidate material to evaluate its energy storage capacity. Requirements: Background in chemistry, materials science, or a related field. Familiarity with physico-chemical and electrochemical characterization techniques. Strong interest in renewable energy and battery technology. Ability to work independently and in a team. Excellent communication skills.

Conception microélectronique d’un discriminateur « zero-crossing » pour les détecteurs à haute résolution de temps 4D-Silicium (LGAD)

Laboratoire de Physique de Clermont UMR6533 • Clermont-Ferrand

Présentiel4-6 moisExpire dans 13 jours

Job Description Position: Microelectronics Design Intern Project Overview Ideal for a thesis project focusing on Research and Development in the field of particle physics, specifically related to experiments like those conducted at the Large Hadron Collider (LHC) at CERN. Emphasis on improving temporal measurements in particle detectors alongside micrometer-level position measurements (4D detector) to enhance event reconstruction. Targeting silicon pixel detectors of the LGAD type for rapid detection of minimally ionizing charged particles. Responsibilities Designing the microelectronic preamplification and signal shaping chain. Evaluating a "zero-crossing" discriminator to reduce measurement error associated with signal amplitude variation (time walk). Predicting temporal measurement dispersion (jitter) using the RMS noise-to-signal derivative ratio as a merit factor. Utilizing Cadence software (Virtuoso and ADE) for integrated circuit design in TSMC 65 nm CMOS technology. Exploring multiple architectures for configurable time constant signal shaping. Optimizing and simulating the selected architecture at the schematic level and potentially post-layout (AC, stability, transient noise, corners, Monte-Carlo). Qualifications Background in microelectronics, semiconductor physics, or related field. Familiarity with Cadence software tools. Strong analytical skills for evaluating circuit performance. Knowledge of CMOS technology and integrated circuit design principles. Ability to work independently and collaboratively in a research-oriented environment. Duration Duration of the internship to be determined based on project requirements and candidate availability. Location The internship will be based at [Company/Institution Name] in [Location]. Application Interested candidates should submit their resume and cover letter to [Contact Information] by [Application Deadline].

Étude et application de modèles d’ordre réduit pour l’analyse d’une cellule de batterie sous sollicitation de charge rapide pulsée

SATIE • Versailles

Présentiel4-6 moisExpire dans 13 jours

Job Description Position: Battery Modeling Intern Objective: Develop a reduced model of a battery cell under pulsed fast charging conditions to study aging phenomena. Responsibilities: Conduct targeted literature review on reduced models for electrochemical and physical phenomena in lithium-ion cells. Implement numerical model based on selected methods. Validate model by comparing with a full model, simulating pulsed charging and analyzing voltage deviations, state of charge evolution, and internal dynamics. Perform optimization analysis of pulsed charging to reduce loss of cyclable lithium and cumulative effects on battery lifespan. Requirements: Background in battery technology, electrochemistry, or related field. Familiarity with numerical modeling and simulation tools. Strong research and analytical skills. Ability to work independently and collaborate in a team setting. Duration: This is a temporary internship position. Location: The position is based at [Company Name/Location]. Application: To apply, please submit your resume and cover letter to [Contact Information].

STAGIAIRE IA ET ML / INGENIEUR DE DONNEES (DATA ENGINEER) (F/H/D) – STAGE

Trench France • Saint-Louis

Présentiel4-6 moisExpire dans 13 jours

Job Title: AI/ML Intern at Trench France Responsibilities: Collaborate with business teams and technical experts to identify relevant AI/ML use cases and develop concrete solutions. Design, develop, and deploy machine learning models. Analyze complex datasets to extract insights. Clean, structure, and engineer data for customs and BI projects. Develop and maintain data pipelines and workflows on Azure. Support teams in data cleaning processes. Document processes and present results to stakeholders using structured reports. Stay updated on AI and ML advancements and innovations. Requirements: Undergraduate or graduate student in a relevant field. Strong interest in artificial intelligence and machine learning. Proficiency in data analysis and programming languages. Ability to work independently and collaboratively. Excellent communication and documentation skills. Benefits: Opportunity to work on high-impact solutions. Freedom for innovation and creativity. Hands-on experience in AI/ML projects. Exposure to cutting-edge technologies. Supportive and collaborative work environment.

Stage en Allocation adaptative de ressources

Université de Lorraine •

Hybride4-6 moisExpire dans 11 jours

Objectives Optimize wireless networks for the synchronization of Digital Twins (DTs) by managing network resources dynamically. Investigate adaptive algorithms leveraging AI and reinforcement learning to improve network performance. Methodology Model the resource allocation problem in wireless networks for DT synchronization, identifying key performance indicators (latency, jitter, packet loss). Implement representative scenarios using network and digital twin simulation tools (e.g., NS-3, OMNeT++). Expected Contributions A novel adaptive resource allocation framework capable of adjusting in real time to varying conditions. Guidelines for integrating adaptive resource allocation into industrial DT deployments. For applications, please send your CV and cover letter to lemia.louail@univ-lorraine.fr.

Stage en Sécurisation des Jumeaux Numériques

Université de Lorraine •

Hybride4-6 moisExpire dans 11 jours

Objectives Identify and classify cyber threats against Digital Twins (DTs), focusing on the communication channel and the model environment. Implement and test lightweight mechanisms to secure the data link. Methodology Conduct a literature review on cyber threats and defenses for DTs. Develop a minimal experimental architecture and simulate representative attacks (data falsification, replay, intrusion attempts). Expected Contributions A comparative study of vulnerabilities affecting communication and/or model security in DTs. A proof-of-concept implementation of security mechanisms with practical recommendations for deploying secure digital twins in industrial contexts. For applications, please send your CV and cover letter to lemia.louail@univ-lorraine.fr.

Ingénieur - Traitement d'images de satellites (H/F)

AIRBUS DEFENCE AND SPACE SAS • Toulouse

Présentiel4-6 moisExpire dans 11 jours

Job Title: Image Quality Assurance Intern Company: ADS Department: Earth Observation Systems Join a team responsible for ensuring the quality of images from earth observation systems developed by ADS. Utilize time series of images acquired by CO3D satellites launched in July 2025 for various image quality enhancement treatments or video sequence creation. Eligibility for clearance by recognized authorities is required for this internship.

STM32 Support Solution Intern

STMicroelectronics •

Hybride4-6 moisExpiré il y a 10 mois

Job Overview This internship position focuses on providing support for STM32 solutions. The intern will work closely with the engineering team to enhance the functionality and performance of STM32 microcontrollers. Responsibilities Assist in the development and testing of STM32-based applications. Collaborate with cross-functional teams to troubleshoot and resolve technical issues. Qualifications Currently pursuing a degree in Electrical Engineering, Computer Science, or a related field. Familiarity with embedded systems and microcontroller programming is a plus. For more information or to apply, please contact us at apply@company.com.

PFE Graduation Project

STMicroelectronics •

Hybride4-6 moisExpiré il y a 10 mois

Project Overview The PFE Graduation Project is designed for students to apply their theoretical knowledge in a practical environment. This project will take place from February to August 2025, providing a comprehensive 6-month experience. Objectives Students will work on real-world problems, enhancing their problem-solving and analytical skills. The project aims to foster collaboration among students, faculty, and industry professionals. Application Process Interested candidates should prepare their CV and a cover letter detailing their motivation and relevant experience. For more information or to submit your application, please contact us at apply@example.com.

Internship in STM32 USB Peripheral Development

STMicroelectronics •

Hybride4-6 moisExpiré il y a 10 mois

Purpose This internship project aims to develop a knowledge base article to guide developers getting started with STM32 USB peripheral as well as OTG dual role application based on the USB peripheral. Work To Be Done Review the existing USB OTG examples. Implement an example based on the USB and its associated middleware. Develop the Getting Started article to initiate users in implementing their applications. Benchmark access to different memories in USB High Speed and Full Speed. Deliver the project on GitHub. Keywords STM32 MCUs Embedded C ST USB Library HAL OTG HS/FS For more information or to apply, please contact us via email.